Data Structures
struct	DMA_CONFIG

Macros
#define	SFRBIT(address, name, bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0)

#define	SFR(address, name) static __sfr __at (address) name;

#define	SBIT(address, name) static __sbit __at (address) name;

#define	SFR16(addressH, addressL, name) static __sfr16 __at (((addressH) << 8) + (addressL)) name;

#define	SFRX(address, name) static volatile unsigned char __xdata __at(address) name;

#define	ISR(source, bank) void ISR_##source() __interrupt(source##_VECTOR) __using(bank)

#define	RFTXRX_VECTOR 0

#define	ADC_VECTOR 1

#define	URX0_VECTOR 2

#define	URX1_VECTOR 3

#define	ENC_VECTOR 4

#define	ST_VECTOR 5

#define	P2INT_VECTOR 6

#define	UTX0_VECTOR 7

#define	DMA_VECTOR 8

#define	T1_VECTOR 9

#define	T2_VECTOR 10

#define	T3_VECTOR 11

#define	T4_VECTOR 12

#define	P0INT_VECTOR 13

#define	UTX1_VECTOR 14

#define	P1INT_VECTOR 15

#define	RF_VECTOR 16

#define	WDT_VECTOR 17

#define	USB_VECTOR P2INT_VECTOR

#define	USBIF P2IF

#define	USBCS0 USBCSIL

#define	USBCNT0 USBCNTL

#define	XDATA_SFR_ADDRESS(sfr) (0xDF00 + ((unsigned int)&(sfr)))

Detailed Description

This header file provides access to the special registers on the CC2511F32, which allow direct manipulation of the chip's hardware.

This file also provides macros for defining Interrupt Service Routines (ISRs).

For documentation, see the CC2511F32 datasheet.

Definition in file cc2511_map.h.

Macro Definition Documentation

#define ISR	(	source,
		bank
	)	void ISR_##source() __interrupt(source##_VECTOR) __using(bank)

Defines or declares an interrupt service routine (ISR). For the interrupt to work, SDCC requires that the declaration must be present in the file that defines main().

Parameters

source	The source of the interrupt. Must be either the first word of one of the *_VECTOR macros defined in this file (e.g. "P1INT").
bank	The register bank to use. Must be a number from 0 to 3, inclusive. If you choose a non-zero bank, then the compiler will assume that the ISR can modify the registers in that bank, and not bother to restore them to their original value. Therefore, we recommend choosing bank 0 unless you want to save some CPU time and you can guarantee that it is OK for the interrupt to modify those registers.

Example ISR declaration (in a .h file):

1 ISR(UTX1, 0);

Example ISR definition (in a .c file):

 ISR(UTX1, 0)
 {
     // code for handling event and clearing interrupt flag
 }

Definition at line 71 of file cc2511_map.h.

#define SFRBIT	(	address,
		name,
		bit7,
		bit6,
		bit5,
		bit4,
		bit3,
		bit2,
		bit1,
		bit0
	)

Value:

SFR(address, name)    \
  SBIT(address+0, bit0) \
  SBIT(address+1, bit1) \
  SBIT(address+2, bit2) \
  SBIT(address+3, bit3) \
  SBIT(address+4, bit4) \
  SBIT(address+5, bit5) \
  SBIT(address+6, bit6) \
  SBIT(address+7, bit7)

Definition at line 23 of file cc2511_map.h.

#define XDATA_SFR_ADDRESS ( sfr ) (0xDF00 + ((unsigned int)&(sfr)))

Evaluates to the XDATA address of an SFR.

Most of the internal SFRs are also part of the XDATA memory space, which means you can have pointers to them of type uint8 XDATA * and you can read or write to them using DMA transfers.

This macro does NOT work with the SFRs that are highlighted in gray in Table 30 of the CC2511F32 datasheet (the "SFR Address Overview" table).

Definition at line 369 of file cc2511_map.h.

Data Structures

Macros

Detailed Description

Macro Definition Documentation