19 #define __interrupt(x)
23 #define SFRBIT(address, name, bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0) \
25 SBIT(address+0, bit0) \
26 SBIT(address+1, bit1) \
27 SBIT(address+2, bit2) \
28 SBIT(address+3, bit3) \
29 SBIT(address+4, bit4) \
30 SBIT(address+5, bit5) \
31 SBIT(address+6, bit6) \
34 #if defined SDCC || defined __CDT_PARSER__
36 #define SFR(address, name) static __sfr __at (address) name;
37 #define SBIT(address, name) static __sbit __at (address) name;
38 #define SFR16(addressH, addressL, name) static __sfr16 __at (((addressH) << 8) + (addressL)) name;
39 #define SFRX(address, name) static volatile unsigned char __xdata __at(address) name;
71 #define ISR(source, bank) void ISR_##source() __interrupt(source##_VECTOR) __using(bank)
74 #error "Unknown compiler."
78 #define RFTXRX_VECTOR 0
84 #define P2INT_VECTOR 6
91 #define P0INT_VECTOR 13
92 #define UTX1_VECTOR 14
93 #define P1INT_VECTOR 15
99 SFRBIT(0x80, P0, P0_7, P0_6, P0_5, P0_4, P0_3, P0_2, P0_1, P0_0)
108 SFRBIT(0x88, TCON, URX1IF, _TCON_6, ADCIF, _TCON_4, URX0IF, _TCON_2, RFTXRXIF, _TCON_0)
117 SFRBIT(0x90, P1, P1_7, P1_6, P1_5, P1_4, P1_3, P1_2, P1_1, P1_0)
126 SFRBIT(0x98, S0CON, _SOCON7, _SOCON6, _SOCON5, _SOCON4, _SOCON3, _SOCON2, ENCIF_1, ENCIF_0)
135 SFRBIT(0xA0, P2, P2_7, P2_6, P2_5, P2_4, P2_3, P2_2, P2_1, P2_0)
144 SFRBIT(0xA8, IEN0, EA, _IEN06, STIE, ENCIE, URX1IE, URX0IE, ADCIE, RFTXRXIE)
162 SFRBIT(0xB8, IEN1, _IEN17, _IEN16, P0IE, T4IE, T3IE, T2IE, T1IE, DMAIE)
171 SFRBIT(0xC0, IRCON, STIF, _IRCON6, P0IF, T4IF, T3IF, T2IF, T1IF, DMAIF)
189 SFRBIT(0xD0, PSW, CY, AC, F0, RS1, RS0, OV, F1, P)
198 SFRBIT(0xD8, TIMIF, _TIMIF7, OVFIM, T4CH1IF, T4CH0IF, T4OVFIF, T3CH1IF, T3CH0IF, T3OVFIF)
207 SFRBIT(0xE0, ACC, ACC_7, ACC_6, ACC_5, ACC_4, ACC_3, ACC_2, ACC_1, ACC_0)
216 SFRBIT(0xE8, IRCON2, _IRCON27, _IRCON26, _IRCON25, WDTIF, P1IF, UTX1IF, UTX0IF, P2IF)
225 SFRBIT(0xF0, B, B_7, B_6, B_5, B_4, B_3, B_2, B_1, B_0)
234 SFRBIT(0xF8, U1CSR, U1MODE, U1RE, U1SLAVE, U1FE, U1ERR, U1RX_BYTE, U1TX_BYTE, U1ACTIVE)
243 #define USB_VECTOR P2INT_VECTOR
247 SFR16(0xD5, 0xD4, DMA0CFG)
248 SFR16(0xD3, 0xD2, DMA1CFG)
249 SFR16(0xAD, 0xAC, FADDR)
250 SFR16(0xBB, 0xBA, ADC)
251 SFR16(0xDB, 0xDA, T1CC0)
252 SFR16(0xDD, 0xDC, T1CC1)
253 SFR16(0xDF, 0xDE, T1CC2)
260 SFRX(0xDF03, PKTCTRL1)
261 SFRX(0xDF04, PKTCTRL0)
264 SFRX(0xDF07, FSCTRL1)
265 SFRX(0xDF08, FSCTRL0)
269 SFRX(0xDF0C, MDMCFG4)
270 SFRX(0xDF0D, MDMCFG3)
271 SFRX(0xDF0E, MDMCFG2)
272 SFRX(0xDF0F, MDMCFG1)
273 SFRX(0xDF10, MDMCFG0)
274 SFRX(0xDF11, DEVIATN)
280 SFRX(0xDF17, AGCCTRL2)
281 SFRX(0xDF18, AGCCTRL1)
282 SFRX(0xDF19, AGCCTRL0)
294 SFRX(0xDF2E, PA_TABLE0)
299 SFRX(0xDF36, PARTNUM)
300 SFRX(0xDF37, VERSION)
301 SFRX(0xDF38, FREQEST)
304 SFRX(0xDF3B, MARCSTATE)
305 SFRX(0xDF3C, PKTSTATUS)
306 SFRX(0xDF3D, VCO_VC_DAC)
310 SFRX(0xDF40, I2SCFG0)
311 SFRX(0xDF41, I2SCFG1)
312 SFRX(0xDF42, I2SDATL)
313 SFRX(0xDF43, I2SDATH)
314 SFRX(0xDF44, I2SWCNT)
315 SFRX(0xDF45, I2SSTAT)
316 SFRX(0xDF46, I2SCLKF0)
317 SFRX(0xDF47, I2SCLKF1)
318 SFRX(0xDF48, I2SCLKF2)
322 SFRX(0xDE00, USBADDR)
334 SFRX(0xDE0C, USBFRML)
335 SFRX(0xDE0D, USBFRMH)
336 SFRX(0xDE0E, USBINDEX)
339 SFRX(0xDE10, USBMAXI)
340 SFRX(0xDE11, USBCSIL)
341 SFRX(0xDE12, USBCSIH)
342 SFRX(0xDE13, USBMAXO)
343 SFRX(0xDE14, USBCSOL)
344 SFRX(0xDE15, USBCSOH)
345 SFRX(0xDE16, USBCNTL)
346 SFRX(0xDE17, USBCNTH)
356 #define USBCS0 USBCSIL
357 #define USBCNT0 USBCNTL
369 #define XDATA_SFR_ADDRESS(sfr) (0xDF00 + ((unsigned int)&(sfr)))
381 unsigned char SRCADDRH;
382 unsigned char SRCADDRL;
383 unsigned char DESTADDRH;
384 unsigned char DESTADDRL;